Samsung S5PC110 Manual page 1657

Risc microprocessor
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S5PC110_UM
10.3.3.21 Video Related Register (V_SYNC_GEN3_0/1/2)
Progressive mode has only one v_sync, whereas interlace mode has two. This register is used for generating
second v_sync of interlace case.
V_SYNC_GEN3_0, R/W, Address = 0xFA11_0150
V_SYNC_GEN3_1, R/W, Address = 0xFA11_0154
V_SYNC_GEN3_2, R/W, Address = 0xFA11_0158
V_SYNC_GEN3_0/1/2
Vsync_H_Pos_St
Vsync_H_Pos_End
60 Hz
VSYNC_H_POS_ST
VSYNC_H_POS_END
V_SYNC_GEN3
50 Hz
VSYNC_H_POS_ST
VSYNC_H_POS_END
V_SYNC_GEN3
Bit
[23:12]
Specifies the bottom field V sync start transition point. For
more details on Vsync_H_Pos_St, refer to "Reference
CEA-861D".
[11:0]
Specifies the bottom field V sync end transition point. For
more details on Vsync_H_Pos_End, refer to "Reference
CEA-861D".
10 9BHIGH-DEFINITION MULTIMEDIA INTERFACE
Description
1920x1080i
1188(d)
1188(d)
4A44A4(h)
1920x1080i
1848(d)
1848(d)
738738(h)
Initial State
0x001
0x001
Other cases
Don't care
Other cases
Don't care
10-48

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