Samsung S5PC110 Manual page 2333

S5PC110_UM
• I2S1 / I2S2 / PCM2 / PCM1 / SPDIF / AC97
Ball Name
XI2S1SCLK I2S_1_SCLK
XI2S1CDCLK I2S_1_CDCLK
XI2S1LRCK I2S_1_LRCK
XI2S1SDI
XI2S1SDO I2S_1_SDO
XPCM2SCLK PCM_2_SCLK
XPCM2EXTCLK PCM_2_EXTCLK
XPCM2FSYNC PCM_2_FSYNC
XPCM2SIN PCM_2_SIN
XPCM2SOUT PCM_2_SOUT
Signal
I2S_1_SCLK
I2S_1_CDCLK
I2S_1_LRCK
I2S_1_SDI
I2S_1_SDO
PCM_2_SCLK
PCM_2_EXTCLK
PCM_2_FSYNC
PCM_2_SIN
PCM_2_SOUT
PCM_1_SCLK
PCM_1_EXTCLK
PCM_1_FSYNC
PCM_1_SIN
PCM_1_SOUT
SPDIF_0_OUT
SPDIF_EXTCLK
LCD_FRM
AC97BITCLK
AC97RESETn
AC97SYNC
Func0
Signal IO
IO
IO
IO
I2S_1_SDI I
O
O
I
O
I
O
I/O
IO IIS-bus serial clock for channel 1
IO IIS CODEC system clock for channel 1
IO IIS-bus channel select clock for channel 1
I IIS-bus serial data input for channel 1
O IIS-bus serial data output for channel 1
O PCM Serial Shift Clock for channel 2
I PCM External Clock for channel 2
O PCM Sync indicating start of word for channel 2
I PCM Serial Data Input for channel 2
O PCM Serial Data Output for channel 2
O PCM Serial Shift Clock for channel 1
I PCM External Clock for channel 1
O PCM Sync indicating start of word for channel 1
I PCM Serial Data Input for channel 1
O PCM Serial Data Output for channel 1
O SPDIFOUT data output
I SPDIF Global Audio Main Clock Input
O FRM SYNC Signal
I AC-Link bit clock(12.288MHz) from AC97 Codec to AC97 Controller
O AC-link Reset to Codec
AC-link Frame Synchronization (Sampling Frequency 48Khz) from AC97
O
Controller to AC97 Codec
Func1
Signal
PCM_1_SCLK
PCM_1_EXTCLK
PCM_1_FSYNC
PCM_1_SIN
PCM_1_SOUT
SPDIF_0_OUT
SPDIF_EXTCLK
LCD_FRM
Description
6 H TYPE SIZE & BALL MAP
Func2
IO Signal
O AC97BITCLK
I AC97RESETn
O AC97SYNC
I AC97SDI
O AC97SDO
O I2S_2_SCLK
I I2S_2_CDCLK
O I2S_2_LRCK
I2S_2_SDI
I2S_2_SDO
Default Reset
IO
I GPI I(L)
O GPI I(L)
O GPI I(L)
I GPI I(L)
O GPI I(L)
IO GPI I(L)
IO GPI I(L)
IO GPI I(L)
I GPI I(L)
O GPI I(L)
6-15