Samsung S5PC110 Manual page 1487

Risc microprocessor
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S5PC110_UM
The
and
Figure 7-13
Figure 7-14
and the ratios of video scale to sync depth are different according to video standards. This is same in YPbPr/RGB
outputs. The setup level and video-to-sync ratio are controlled by CSETUP, CSYNC, VSETUP and VSYNC bits in
SDO_SCALE registers. Note that the configuration of setup level and video-to-sync ratio in our implementation are
set regardless of video standards and output format.
100 IRE
20 IRE
20 IRE
40 IRE
depict the typical CVBS waveforms generated. Figure show that the setup level
3.58 MHZ
Color Burst
(9 ± 1 Cycles)
7.5 IRE
Blank Level
Luminance Level
Figure 7-13 NTSC (M) Composite Video Signal with 75% Color Bars
Color
Saturation
Phase = Hue
7 6BTVOUT & VIDEO DAC
W hite Level
Black Level
Blank Level
Sync Level
7-15

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