Samsung S5PC110 Manual page 1376

S5PC110_UM
4.6.1.4 DPHY State Register (CSIS_DPHYSTS, R, Address = 0xFA60_000C)
CSIS_DPHYSTS
Reserved
UlpsDat
StopStateDat
Reserved
UlpsClk
StopStateClk
Bit
[31:12] Reserved
[11:8] Determines whether the data lane [3:0] is in ULPS.
[7]: Data lane 3
[6]: Data lane 2
[5]: Data lane 1
[4]: Data lane 0
0 = Not ULPS
1 = ULPS
[7:4] Determines whether the data lane [3:0] is in Stop state.
[7]: Data lane 3
[6]: Data lane 2
[5]: Data lane 1
[4]: Data lane 0
0 = Not Stop state
1 = Stop state
[3:2] Reserved
[1] Determines whether the clock lane is in ULPS.
0 = Not ULPS
1 = ULPS
[0] Determines whether the clock lane is in Stop state.
0 = Not Stop state
1 = Stop state
Description
4 3BMIPI CSIS
Initial State
0
0
F
0
0
1
4-9