Samsung S5PC110 Manual page 1688

S5PC110_UM
SPDIFIN_IRQ_STATUS
wrong_preamble_ir
ch_status_recovered_ir
wrong_signal_ir
For every bit, the following holds: Reading returns interrupt request status. Writing '0' has no effect. Writing '1'
clears the interrupt request.
1) Detection of stream header
Waits for matching of Pa, Pb and 0xF872, 0x4E1F respectively.
Waits for repetition time (from decoded PC value or user-defined PC in
SPDIFIN_USER_VALUE.repetition_time_manual, based on SPDIFIN_CONFIG. PcPd_value_mode)
Check for matching of Pa, Pb on right time.
Bit
[2] 0 = No interrupt
1 = Detects preamble but indicates a problem
with the detected time
- This interrupt is asserted when
SPDIFIN_OP_CTRL.op_ctrl is equal to 001b or
011b.
- Meaningless until ch_status_recovered_ir is
asserted initially after
SPDIFIN_OP_CTRL.op_ctrl=01b
- Cases for interrupt
Case1: Detects preamble in the middle of a
subframe audio sample word time
Case2: Does not detect the next preamble at
exact time after a subframe duration
Case3: Does not detect preamble B (or M or W)
but detects other preamble at that time
[1] 0 = No interrupt
1 = Recovered channel status
Detects two consecutive B-preambles; thus
recovers 192-bit wide channel status.
- Only supports consumer mode, so only 36-bits
are reconstructed. If you want to see the channel
status bits through SPDIFIN_CH_STATUS_x,
read two consecutive 'ch_status_recovered_ir'
and the register each time. If these two channel
status values are the same, you can rely on that
value.
[0] 0 = No interrupt
1 = Clock recovery fails
Cannot recover the clock from input due to
tolerable range violation (unlock), no signal from
outside, or non-biphase in non-preamble
duration.
- Meaningless until ch_status_recovered_ir is
asserted initially after
SPDIFIN_OP_CTRL.op_ctrl=01b.
10 9BHIGH-DEFINITION MULTIMEDIA INTERFACE
Description Initial State
0
0
0
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