Samsung S5PC110 Manual page 1389

S5PC110_UM
5.1.5.9 Vertex Processing
There are three main processes within the PowerVR architecture that must be performed to generate 3D graphics.
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To create screen space representation, triangle information in the form of vertices must be transformed and
be lit.
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To create display lists in memory, these transformed and lit vertices are passed through a tiling engine.
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To create the final image in the Pixel Processing pipeline, the display list in memory is rasterized on a tile-by-
tile basis. The transform and light and tiling operation together can be regarded as the vertex-processing
pipeline.
5.1.5.10 Transform and Lighting
A 3D object is expressed in terms of triangles, each of which is made up of three vertices with a minimum of X, Y,
and Z coordinates. The basic steps to transform a typical 3D application are explained below, along with a brief
description of lighting models. The transform and lighting (TNL) process within SGX540 is performed by data
moving through VDM, PDS, and USSE respectively.
5.1.5.11 Macro Tiling Engine
The Macro Tiling Engine (MTE) takes in vertex and index data from the USSE and PDS, and generates a macro-
tiled block of vertex index data. This data is written to memory after removing the redundant data. In addition to
this, the MTE generates a set of primitive blocks for the tiling engine. A primitive block is a list of primitives, where
each primitive consists of its indices and fixed point x,y of the vertices.
5.1.5.12 Tiling Engine
The Tiling Engine (TE) accepts blocks of primitive data from the MTE, and performs two incremental tiling
algorithms, namely, the bounding box and perfect tiling algorithms. These algorithms produce a minimal list of tiles
containing the primitives. Information about the primitives contained within the tiles is written as a control stream
(display list) to memory, which is dynamically allocated by the Dynamic Parameter Management (DPM) block.
5.1.5.13 Dynamic Parameter Management
DPM ensures that SGX540 is able to render arbitrarily complex scenes. During tiling, the DPM allocates memory
from a parameter memory pool, and after rasterization releases it. SGX540 breaks down the display list into
groups of tiles (macro tiles), and each macro tile is rendered separately ("Partial Rendering"). As each macro tile
is rendered, the results are merged with the render results from a previous macro tile to produce the correct final
image.
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