S5PC110_UM
10 9BHIGH-DEFINITION MULTIMEDIA INTERFACE
The HDMI link part uses pixel and TMDS clock. Pixel and TMDS clocks are from HDMI PHY. You must configure
it before use. VCLKHS (MIXER pixel clock) and VCLKH (HDMI pixel clock) are synchronous. Thus, the same
clock is fed through VCLKHS and VCLKH. For pixel frequency, refer to
Figure
10-6.
Figure 10-6
Frequency Summary in Use
10-13