Samsung S5PC110 Manual page 2295

S5PC110_UM
• Memory port 1 (Dedicated)
Ball Name
XM1ADDR_0
~ XM1ADDR_15
XM1DATA_0
~XM1DATA_31
XM1DQS_0
~XM1DQS_3
XM1DQSn_0
~XM1DQSn_3
XM1DQM_0
~XM1DQM_3
XM1CKE_0
~XM1CKE_1
XM1SCLK
XM1nSCLK
XM1CSn_0
~XM1CSn_1
XM1RASn
XM1CASn
XM1WEn
XM1GateIn
XM1GateOut
I/O
IO Memory port 1DRAM Address bus (16bit)
IO Memory port 1DRAM Data bus.(32bit)
IO Memory port 1DRAM Data Mask (4bit)
IO Memory port 1DRAM Data Strobe (4bit)
IO Memory port 1DRAM Data Differential Strobe neg.( only LPDDR2 ) (4bit)
IO Memory port 1DRAM Clock Enable (2bit)
IO Memory port 1DRAM Clock
IO Memory port 1DRAM Inverted Clock of Xm1SCLK
IO Memory port 1DRAM Chip Select support up to 2 memory bank (2bit)
IO Memory port 1DRAM Row Address Strobe
IO Memory port 1DRAM Column Address Strobe
IO Memory port 1DRAM Write Enable
I Input signal for DQS cleaning signal Input
O Output signal to DQS cleaning signal output
5 G TYPE SIZE & BALL MAP
Description
5-33