Samsung S5PC110 Manual page 1791

S5PC110_UM
13.5.7.4 Pattern Offset Register (PAT_OFFSET_REG, R/W, Address = 0xFA00_050C)
PAT_OFFSET_REG
Reserved
PatOffsetY
Reserved
PatOffsetX
13.5.7.5 Pattern Stride Register (PAT_STRIDE_REG, R/W, Address = 0xFA00_0510)
PAT_STRIDE_REG
Reserved
PatStride
Bit
[31:29] Reserved
[28:16] Y value of pattern offset. Range: 1 ~ 8000
[15:13] Reserved
[12:0] X value of pattern offset. Range: 1 ~ 8000.
Bit
[31:16] Reserved
[15:0] Pattern stride ( 2's complement value)
Description
Description
13 12BG2D
Initial State
0x0
0x0
0x0
0x0
Initial State
0x0
0x0
13-22