Samsung S5PC110 Manual page 1950

S5PC110_UM
8.7.1.3 KEYPAD Interface Column Data Output Register (KEYIFCOL, R/W, Address = 0xE160_0008)
KEYIFCOL Bit
Reserved [31:16]
KEYIFCOLEN [15:8]
KEYIFCOL [7:0]
8.7.1.4 KEYPAD Interface Row Data Input Register (KEYIFROW, R, Address = 0xE160_000C)
KEYIFROW Bit
Reserved [31:16]
KEYIFROW [13:0]
8.7.1.5 KEYPAD Interface Debouncing Filter Clock Division Register (KEYIFFC, R/W, Address =
0xE160_0010)
KEYIFFC Bit
Reserved [31:10]
KEYIFFC [9:0]
Reserved for future use
KEYPAD interface column data output tri-state enable register
Each bit is for each KEYIFCOL bit.
0 = Output pad tri-state buffer enable(Normal output),
1 = Output pad Tri-state buffer disable(High-Z output) (@ reset)
KEYPAD interface column data output register
Reserved for future use
KEYPAD interface row data input register (read only)
This register values from input ports are not filtered data.
Reserved for future use
KEYPAD interface debouncing filter clock division register.
User can set compare value for 10-bit up-counter.
This register value means when FC_EN bit is HIGH.
FCLK = FLT_CLK / (KEYIFFC[9:0] + 1)
(FLT_CLK is from FINpll)
Description
Description
Description
8 KEYPAD INTERFACE
Initial State
-
8'b1111_1111
8'b0
Initial State
-
Reflects input
ports
Initial State
-
10'b0
8-13