Samsung S5PC110 Manual page 1911

S5PC110_UM
6.4.2 CHANNEL CODING
To minimize the dc component on the transmission line, to facilitate clock recovery from the data stream and to
make the interface insensitive to the polarity of connections, time slots 4 to 31 are encoded in biphase-mark. A
symbol comprising two consecutive binary states represent each bit to be transmitted. The first state of a symbol
is always different from the second state of the previous symbol. The second state of the symbol is identical to the
first if the bit to be transmitted is logical "0", is different from the first if the bit is logical "1".
6.4.3 PREAMBLE
Preambles are specific patterns providing synchronization and identification of the sub-frames and blocks. A set of
three preambles (M, B and W) is used. These preambles are transmitted in the time allocated to four time slots
(time slots 0 to 3) and are represented by eight successive states. The first state of the preamble is always
different from the second state of the previous symbol.
Similar to bi-phase code, these preambles are dc free and provide clock recovery. They differ in minimum two
states from any valid bi-phase sequence.
Figure 6-4 Channel Coding
6 SPDIF TRANSMITTER
Clock (twice bit rate)
Source coding
Channel coding
(bi-phase mark)
6-5