Samsung S5PC110 Manual page 1655

Risc microprocessor
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S5PC110_UM
10.3.3.18 Video Related Register (H_SYNC_GEN_0/1/2)
H_SYNC_GEN_0, R/W, Address = 0xFA11_0120
H_SYNC_GEN_1, R/W, Address = 0xFA11_0124
H_SYNC_GEN_2, R/W, Address = 0xFA11_0128
H_SYNC_GEN_0/1/2
-
Hsync_Pol
Hsync_Edn
Hsync_Start
60Hz
HSYNC_START
HSYNC_END
HSYNC_POL
H_SYNC_GEN
50Hz
HSYNC_START
HSYNC_END
HSYNC_POL
H_SYNC_GEN
Bit
[23:21]
Reserved
[20]
Inverts the generated signal to meet the modes. In 720p
and 1080i modes, you don't need to invert the signal.
Other modes need to be inverted. For more details on
Hsync_Pol, refer to "Reference CEA-861D".
0 = Active high
1 = Active low
[19:10]
Sets the end point of H sync. For more details on
Hsync_Edn, refer to "Reference CEA-861D".
[9:0]
Sets the start point of H sync. For more details on
Hsync_Start, refer to "Reference CEA-861D".
720x480p
14(d)
76(d)
1
11300e(h)
720x576p
10(d)
74(d)
1
11280a(h)
10 9BHIGH-DEFINITION MULTIMEDIA INTERFACE
Description
1280x720p
1920x1080i
108(d)
148(d)
0
2506c(h)
20856(h)
1280x720p
1920x1080i
438(d)
478(d)
0
779b6(h)
8ea0e(h)
Initial State
1920x1080p
86(d)
86(d)
130(d)
130(d)
0
20856(h)
1920x1080p
526(d)
526(d)
570(d)
570(d)
0
8ea0e(h)
0x0
0
0x000
0x000
0
0
10-46

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