Samsung S5PC110 Manual page 1635

S5PC110_UM
Register
VIDEO_PATTERN_
GEN
HPD_GEN
SPDIF Registers
SPDIFIN_CLK_CTRL
SPDIFIN_OP_CTRL
SPDIFIN_IRQ_MASK
SPDIFIN_IRQ_STAT
US
SPDIFIN_CONFIG_1
SPDIFIN_CONFIG_2
-
-
SPDIFIN_USER_
VALUE_1
SPDIFIN_USER_
VALUE_2
SPDIFIN_USER_
VALUE_3
SPDIFIN_USER_
VALUE_4
SPDIFIN_CH_STAT
US_0_1
SPDIFIN_CH_STAT
US_0_2
SPDIFIN_CH_STAT
US_0_3
SPDIFIN_CH_STAT
US_0_4
SPDIFIN_CH_STAT
US_1
-
SPDIFIN_FRAME_P
ERIOD_1
SPDIFIN_FRAME_P
ERIOD_2
Address R/W
0xFA11_05C4 R/W
0xFA11_05C8 R/W
0xFA13_0000 R/W
0xFA13_0004 R/W
0xFA13_0008 R/W
0xFA13_000C R/W
0xFA13_0010 R/W
0xFA13_0014 R/W
0xFA13_0018 -
0xFA13_001C -
0xFA13_0020 R/W
0xFA13_0024 R/W
0xFA13_0028 R/W
0xFA13_002C R/W
0xFA13_0030 R
0xFA13_0034 R
0xFA13_0038 R
0xFA13_003C R
0xFA13_0040 R
0xFA13_0044 -
0xFA13_0048 R
0xFA13_004C R
10 9BHIGH-DEFINITION MULTIMEDIA INTERFACE
Description
Specifies the video pattern generation
register.
Specifies the HPD duration value register.
Specifies the SPDIFIN clock control register.
Specifies the SPDIFIN operation control
register 1.
Specifies the SPDIFIN interrupt request mask
register.
Specifies the SPDIFIN interrupt request
status register.
Specifies the SPDIFIN configuration register
1.
Specifies the SPDIFIN configuration register
2.
Reserved
Reserved
Specifies the SPDIFIN user value register 1.
Specifies the SPDIFIN user value register 2.
Specifies the SPDIFIN user value register 3.
Specifies the SPDIFIN user value register 4.
Specifies the SPDIFIN channel status
register 0-1.
Specifies the SPDIFIN channel status
register 0-2.
Specifies the SPDIFIN channel status
register 0-3.
Specifies the SPDIFIN channel status
register 0-4.
Specifies the SPDIFIN channel status
register 1.
Reserved
Specifies the SPDIFIN frame period register
1.
Specifies the SPDIFIN frame period register
2.
Reset Value
0x00
0x01
0x02
0x00
0x00
0x00
0x02
0x00
-
-
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
-
0x00
0x00
10-26