Samsung S5PC110 Manual page 1849

Risc microprocessor
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S5PC110_UM
2.9.1.12 IIS AHB DMA Size Register (IISSIZE, R/W, Address = 0xEEE3_0028)
IISSIZE
Bit
TRNS_SIZE
[31:16]
Reserved
[15:0]
2.9.1.13 IIS AHB DMA Transfer Count Register (IISTRNCNT, R, Address = 0xEEE3_002C)
IISTRNCNT
Bit
Reserved
[31:24]
IISTRNCNT
[23:0]
2.9.1.14 IIS AHB DMA Level 0 Interrupt Address Register (IISLVL0ADDR, R/W, Address = 0xEEE3_0030)
IISLVL0ADDR
Bit
IISLVL0ADDR
[31:10]
Reserved
[9:1]
IISLVL0STOP
[0]
Transfer block size for IIS internal DMA
When IIS internal DMA is enabled, IIS internal DMA will
transfer TRNS_SIZE word(s) data from memory before DMA
done interrupt occurs.
Valid ranges for TRNS_SIZE will be from 0x0001 to 0xA000.
0x0001 − 0xA000 : IMEM and DMEM at AUDIO Sub-System
(160Kbytes)
-
-
Number of transferred data using IIS internal DMA. (word
unit)
User program can terminate IIS internal DMA operation by
turning DMA_EN off. After DMA_EN is 0, user program reads
IISTRNCNT value to know where IIS internal DMA stops.
AHB DMA level 0 interrupt address
While IISLVL0EN in IISAHB register is set, AHB DMA is
comparing this register to generated address in DMA. When
two values match, IISLVL0INT in IISAHB will be set.
Valid address range for IISLVL0ADDR is from 0xC000_0000
to 0xC01F_FFFF.
-
Enables Precise stop
0 = Do not stop DMA operation
1 = Stop DMA operation when DMA working address is
matched with IISLVL0ADDR. IISDMAEN in IISAHB will be
turned off automatically.
Description
Description
Description
2 IIS MULTI AUDIO INTERFACE
R/W
Initial State
R/W
0x7FFF
R
0x0000
R/W
Initial State
R
R
R/W
Initial State
R
0x00
R
0x00
R/W
0
2-32

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