Samsung S5PC110 Manual page 1704

S5PC110_UM
10.3.5.12 Channel Status Register (I2S_CH_ST_1, I2S_CH_ST_SH_1)
•
I2S_CH_ST_1, R/W, Address = 0xFA14_002C
•
I2S_CH_ST_SH_1, R, Address = 0xFA14_0040
I2S_CH_ST_1,
I2S_CH_ST_SH_1
category
10.3.5.13 Channel Status Register (I2S_CH_ST_2, I2S_CH_ST_SH_2)
•
I2S_CH_ST_2, R/W, Address = 0xFA14_0030
•
I2S_CH_ST_SH_2, R, Address = 0xFA14_0044
I2S_CH_ST_2,
I2S_CH_ST_SH_2
channel_number
source_number
10.3.5.14 Channel Status Register (I2S_CH_ST_3, I2S_CH_ST_SH_3)
•
I2S_CH_ST_3, R/W, Address = 0xFA14_0034
•
I2S_CH_ST_SH_3, R, Address = 0xFA14_0048
I2S_CH_ST_3,
I2S_CH_ST_SH_3
-
Clock_Accuracy
Sampling_Frequency
Bit
[7:0] Specifies the equipment type.
CD player: 0000_0001
DAT player: L000_0011
DCC player: L100_0011
Mini disc: L100_1001
(L: information about generation status of the material)
Bit
[7:4] Specifies the channel number.
Note: bit4 is LSB.
[3:0] Specifies the source number.
Note: bit0 is LSB.
Bit
[7:6] Reserved
[5:4] Specifies the clock accuracy, as specified in IEC-60958-
3.
2b01 = Level I, ±50 ppm
2b00 = Level II, ±1000 ppm
2b10 = Level III, variable pitch shifted
[3:0] Specifies the sampling frequency, as specified in IEC-
60958-3.
4b0000 = 44.1 kHz
4b0010 = 48 kHz
4b0011 = 32 kHz
4b1010 = 96 kHz
...
10 9BHIGH-DEFINITION MULTIMEDIA INTERFACE
Description
Description
Description
Initial State
0
Initial State
0
0
Initial State
2b00
2b00
0
10-95