Samsung S5PC110 Manual page 1765

Risc microprocessor
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S5PC110_UM
12.7.1.23 JPEG Clock Control Register (JPGCLKCON, R/W, Address = 0xFB60_006C)
JPGCLKCON
Reserved
CLK_DOWN_READY
POWER_ON
12.7.1.24 JPEG Start Register (JSTART, W, Address = 0xFB60_0070)
JSTART
Reserved
JSTART
12.7.1.25 JPEG SW Reset Register (SW_RESET, R/W, Address = 0xFB60_0078)
SW_RESET
Reserved
SW_RESET
Bit
[31:2]
Reserved
[1]
0 = Clock is enabled.
1 = JPEG is ready for disabling clock (Default).
This value is changed to 1 if POWER_ON is set as 0 and
JPEG is not working.
This value is changed to 0 if POWER_ON is set as 1.
If this value is 1, JSTART command is ineffective.
This bit is read only.
[0]
0 = Disables Clock (Default).
1 = Activates Clock.
Bit
[31:1]
Reserved
[0]
To start compression/ decompression, set this value to 1.
After one clock, it is cleared with 0 internally.
Before starting operation, you must set essential registers.
Bit
[31:1]
Reserved
[0]
Writing 1 resets JPEG IP.
Before reset finishes, its value is kept as 1.
After reset is done, it is cleared with 0 internally.
Therefore it is necessary to check this value is 0 before
setting registers and starting operation.
Description
Description
Description
12 11BJPEG
Initial State
0
1
0
Initial State
0
0
Initial State
0
0
12-23

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