Samsung S5PC110 Manual page 1772

Risc microprocessor
Table of Contents

Advertisement

S5PC110_UM
13.4 RENDERING PIPELINE
The rendering pipeline of FIMG-2D V3.0 is illustrated in
each stage are introduced in detail in the rest of this chapter.
13.4.1 PRIMITIVE DRAWING
Primitive Drawing determines the pixels to fill, and pass their coordinates to the next stage for further operations.
FIMG-2D V3.0 supports bit block transfer.
13.4.1.1 Bit Block Transfer
A Bit Block Transfer is a transformation of a rectangular block of pixels. Typical applications include copying the
off-screen pixel data to frame buffer, selecting one of two raster operations by mask value, combining to bitmap
patterns by the selected raster operation, changing the dimension of a rectangular image and so on.
Stretch Bit Block Transfer is implemented using Bresnham algorithm and nearest sampling.
13.4.1.1.1 On-Screen Rendering
On-screen bit block transfer copies a rectangular block of pixels on screen to another position on the same
screen. Note that on-screen rendering has the following restriction:
SRC_BASE_ADDR_REG = DST_BASE_ADDR_REG
SRC_SIZE_REG = DST_SIZE_REG
SRC_COLOR_MODE_REG = DST_COLOR_MODE_REG
13.4.1.1.2 Off-Screen Rendering
Off-screen bit block transfer copies pixel data from off-screen memory to frame buffer. Color format conversion is
performed automatically if SRC_COLOR_MODE_REG differs from DST_COLOR_MODE_REG.
Figure
Figure 13-2
FIMG-2D Rendering Pipeline
13-2. The functionality and related registers of
13 12BG2D
13-3

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents