Samsung S5PC110 Manual page 1409

S5PC110_UM
6.3.2 CONTROL REGISTERS
6.3.2.1 MFC Core Control Register
6.3.2.1.1 MFC Software Reset Register (MFC_SW_RESET, R/W, Address = 0xF170_0000)
MFC_SW_RESET
Reserved
RSTN_RG_MPEG2
RSTN_RG_MPEG4
RSTN_RG_VC1
RSTN_RG_H264
RSTN_RG_COMMON
RSTN_DMX
RSTN_VI
RSTN_MFCCORE
RSTN_MC
RSTN_RISC
6.3.2.1.2 RISC to Host Interrupt Register (MFC_RISC_HOST_INT, R/W, Address = 0xF170_0008)
MFC_RISC_HOST_INT
Reserved
INTERRUPT
6.3.2.1.3 HOST2RISC Command Register (MFC_HOST2RISC_COMMAND, R/W, Address = 0xF170_0030)
MFC_HOST2RISC_
COMMAND
HOST2RISC_COMMAN
D
Bit
[31:10] Reserved
[9] Soft reset for RG_MPEG2
[8] Soft reset for RG_MPEG4
[7] Soft reset for RG_VC1
[6] Soft reset for RG_H264
[5] Soft reset for RG_COMMON and RG_DECCOM
[4] Soft reset for DMX 0
[3] Soft reset for VI
[2] Soft reset for MFC core
[1] Soft reset for MC
[0] Soft reset for RISC core
Bit
[31:1] Reserved
[0] 0 = Interrupt clear
1 = Interrupt is raised by MFC
Bit
[31:0] 0 = No operation
1 = OPEN_CH (open instance)
2 = CLOSE_CH (close instance)
3 = SYS_INIT (system initialization)
4 = FLUSH_COMMAND (flush commands in ch0, ch1)
5 = SLEEP
6 = WAKEUP
7 = CONTINUE_ENC (continue encoding)
8 = ABORT_ENC (abort encoding)
Description
Description
Description
6 5BMULTI FORMAT CODEC
Initial State
0
1
1
1
1
1
1
1
1
1
0
Initial State
0
0
Initial State
0
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