Samsung S5PC110 Manual page 1716

Risc microprocessor
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S5PC110_UM
10.3.6.30 HSYNC width Configuration for MHL Interface (MHL_HSYNC_WIDTH, R/W, Address =
0xFA15_017C)
MHL_HSYNC_WIDTH
MHL_HSYNC_WIDTH
10.3.6.31 VSYNC width Configuration for MHL Interface (MHL_VSYNC_WIDTH, R/W, Address =
0xFA15_0180)
MHL_VSYNC_WIDTH
MHL_VSYNC_WIDTH
10.3.6.32 RGB Clock Inversion for MHL Interface (MHL_CLK_INV, R/W, Address = 0xFA15_0184)
MHL_CLK_INV
MHL_CLK_INV
Bit
[7:0]
Specifies the HSYNC width for MHL interface
(Unit: pixel clock).
The HSYNC width is MHL_HSYNC_WIDTH + 1.
Bit
[7:0]
Specifies the VSYNC width for MHL interface
(Unit: line).
Bit
[0]
Specifies the clock out inversion for MHL
interface.
0 = Normal
1 = Inversion
10 9BHIGH-DEFINITION MULTIMEDIA INTERFACE
Description
Description
Description
Initial State
0xF
Initial State
0x1
Initial State
0x0
10-107

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