Samsung S5PC110 Manual page 1918

S5PC110_UM
SPDCON
user_data_attach
User Data Interrupt Status
User Data Interrupt Enable
Buffer Empty Interrupt
Status
Buffer Empty Interrupt Enable
Stream End Interrupt
Status
Stream End Interrupt Enable
software reset
Main Audio Clock
Frequency
Bit
10 = 3 byte swap
o_data={in_data[7:0], in_data[15:8], in_data[23:16]}
11 = 2 byte swap
o_data={0x00,in_data[7:0], in_data[15:8]}
*in_data: BUS → in port of SPDIF
o_data: in port of SPDIF → Logic
[12] 0 = User data is stored in USERBIT register.
User data of subframe is out from USERBIT1,2,3
(96-bit)
1 = User data is stored in 23rd bit of audio data.
User data is out in PCM data's 23th bit.
[11] Read Operation
0 = No interrupt pending.
1 = Interrupt pending when 96-bit of user data is out.
Write Operation
0 = No effect.
1 = Clear this flag.
[10] 0 = Interrupt masked
1 = Interrupt enable
[9] Read Operation
0 = No interrupt pending.
1 = Interrupt pending.
Write Operation
0 = No effect.
1 = Clear this flag.
[8] 0 = Interrupt masked
1 = Interrupt enable
[7] Read Operation
0 = No interrupt pending.
1 = Interrupt pending when the number of output
audio data reaches repetition count in SPDCNT
register.
Write Operation
0 = No effect.
1 = Clear this flag.
[6] 0 = Interrupt masked
1 = Interrupt enable
[5] 0 = Normal operation
1 = Software reset
Software reset is 1-cycle pulse (auto clear)
Enable I_MCLK before software reset assertion
because SPDIF uses synchronous reset
[4:3] 00 = 256fs
01 = 384fs
Description
6 SPDIF TRANSMITTER
Initial State
0
0
0
0
0
0
0
0
0
6-12