Samsung S5PC110 Manual page 1703

S5PC110_UM
10.3.5.10 Channel Status Register (I2S_CH_ST_CON, R/W, Address = 0xFA14_0024)
I2S_CH_ST_CON
-
channel_status_reload
Channel status information needs to be applied to the audio stream at the IEC 60958 block boundary. For this
synchronization, there are two register sets for channel status block. You can set the channel status registers,
I2S_CH_ST_0~I2S_CH_ST_4, while the I2S Rx module still refers to the shadow channel status registers,
I2S_CH_ST_SH_0~ I2S_CH_ST_CH4.
To reflect the user configuration in the channel status registers, set 'channel_status_reload' bit in
I2S_CH_ST_CON, then I2S Rx module copies the channel status registers into the shadow channel status
registers at the beginning of an IEC-60958 block.
10.3.5.11 Channel Status Register (I2S_CH_ST_0, I2S_CH_ST_SH_0)
•
I2S_CH_ST_0, R/W, Address = 0xFA14_0028
•
I2S_CH_ST_SH_0, R, Address = 0xFA14_003C
I2S_CH_ST_0,
I2S_CH_ST_SH_0
channel_status_mode
emphasis
copyright
audio_sample_word
channel_status_block
NOTE: The bits listed here in channel status registers look swapped from those in IEC-60958-3 specification, as the bit order
is different (LSB is right-most bit).
Bit
[7:1] Reserved
[0] 0 = Updates the shadow channel status registers
1 = Sets this bit to update the shadow channel status
registers with the values updated in I2S_CH_ST_0 ~
I2S_CH_ST_4.
This bit is cleared if the shadow channel status registers
are updated.
Bit
[7:6] 2b00 = Mode 0
Others = Reserved
[5:3] If bit1 = 0,
3b000 = 2 audio channels without pre-emphasis*
3b001 = 2 audio channels with 50us/ 15us pre-emphasis
If bit1 = 1,
3b000 = default state
[2] 0 = Copyright
1 = No copyright
[1] 0 = linear PCM
1 = Non-linear PCM
[0] 0 = Consumer format
1 = Professional format
10 9BHIGH-DEFINITION MULTIMEDIA INTERFACE
Description
Description
Initial State
0
0
Initial State
0
0
0
0
0
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