Samsung S5PC110 Manual page 1503

Risc microprocessor
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S5PC110_UM
7.12.1.5 SDO Channel #0 Scale Control Register (SDO_SCALE_CH0, R/W, Address = 0xF900_001C)
Figure 7-16 Individual Gain & Offset Control for DAC Channel Balancing
SDO_SCALE_CH0
Reserved
Offset of Channel 0 Signal
Scale Conversion
Reserved
Gain of Channel 0 Signal
Scale Conversion
Bit
[31:26]
Reserved, read as zero, do not modify
[25:16]
Function F(x) = (X+Offset) * Gain
0x1FF = +511
...
0x001 =
+1
0x000 =
0x3FF =
-1
...
0x200 = -512
This setting is valid if the bit [6] of SDO_CONFIG
register is set to component.
[15:12]
Reserved, read as zero, do not modify
[11:0]
Function F(x) = (X+Offset) * Gain
0x000 =
x0.0
...
0x400 =
x0.5
...
0x800 =
x1.0
...
0xC00 =
x1.5
...
0xFFF =
x1.999512, (2048*2 – 1)/2048
This setting is valid if the bit [6] of SDO_CONFIG
register is set to component.
Description
0
7 6BTVOUT & VIDEO DAC
Initial State
0
000
0
800
7-31

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