Samsung S5PC110 Manual page 1936

S5PC110_UM
7.7.1.6 Pen Status Register (TSPENSTATn)
• TSPENSTAT0, R/W, Address = 0xE170_0014
• TSPENSTAT1, R/W, Address = 0xE170_1014
TSPENSTATn
TSC_UP
TSC_DN
7.7.1.7 ADC Interrupt Clear Register (CLRINTADCn)
• CLRINTADC0, W, Address = 0xE170_0018
• CLRINTADC1, W, Address = 0xE170_1018
These registers are used to clear the interrupts. Interrupt service routine is responsible to clear interrupts after the
interrupt service is completed. Writing any values on this register will clear up the relevant interrupts asserted.
When it is read, undefined value will be returned.
CLRINTADCn
INTADCCLR
Bit
[1] Pen up interrupt history. (after check, this bit should be
cleared manually)
0 = No pen up state.
1 = Pen up interrupt has been occurred.
[0] Pen down interrupt history. (after check, this bit should be
cleared manually)
0 = No pen down state.
1 = Pen down interrupt has been occurred.
Bit
[0] INT_ADCn interrupt clear. Cleared if any value is written.
7 ADC & TOUCH SCREEN INTERFACE
Description
Description
Initial State
0
0
Initial State
-
7-15