Samsung S5PC110 Manual page 1850

Risc microprocessor
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S5PC110_UM
2.9.1.15 IIS AHB DMA Level 1 Interrupt Address Register (IISLVL1ADDR, R/W, Address = 0xEEE3_0034)
IISLVL1ADDR
Bit
IISLVL1ADDR
[31:10]
Reserved
[9:1]
IISLVL1STOP
[0]
2.9.1.16 IIS AHB DMA Level 2 Interrupt Address Register (IISLVL2ADDR, R/W, Address = 0xEEE3_0038)
IISLVL2ADDR
Bit
IISLVL2ADDR
[31:10]
Reserved
[9:1]
IISLVL2STOP
[0]
AHB DMA level 1 interrupt address
While IISLVL1EN in IISAHB register is set, AHB DMA is
comparing this register to generated address in DMA. When
two values match, IISLVL1INT in IISAHB will be set.
Valid address range for IISLVL1ADDR is from 0xC000_0000
to 0xC01F_FFFF.
-
Enables Precise stop
0 = Do not stop DMA operation
1 = Stop DMA operation when DMA working address is
matched with IISLVL1ADDR. IISDMAEN in IISAHB will be
turned off automatically.
AHB DMA level 2 interrupt address
While IISLVL2EN in IISAHAB register is set, AHB DMA is
comparing this register to generated address in DMA. When
two values match, IISLVL2INT in IISAHB will be set.
Valid address range for IISLVL2ADDR is from 0xC000_0000
to 0xC01F_FFFF.
-
Enables Precise stop
0 = Do not stop DMA operation
1 = Stop DMA operation when DMA working address is
matched with IISLVL2ADDR. IISDMAEN in IISAHB will be
turned off automatically.
Description
Description
2 IIS MULTI AUDIO INTERFACE
R/W
Initial State
R
0x00
R
0x00
R/W
0
R/W
Initial State
R
0x00
R
0x00
R/W
0
2-33

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