Samsung S5PC110 Manual page 1693

S5PC110_UM
The channel status registers are updated every 192 frames (1 block) of SPDIF format only for consumer mode.
10.3.4.11 Channel Status Register (SPDIFIN_CH_STATUS_0_1, R, Address = 0xFA13_0030)
SPDIFIN_CH_STATUS_0_1
channel_status_mode
emphasis
copyright_assertion
audio_sample_word
channel_status_block
This register is updated every 192 frames (1 block) of SPDIF format.
SPDIFIN_CH_STATUS_0_1 [7:0] is the matched internal register SPDIFIN_CH_STATUS_0 [7:0].
10.3.4.12 Channel Status Register (SPDIFIN_CH_STATUS_0_2, R, Address = 0xFA13_0034)
SPDIFIN_CH_STATUS_0_2
category_code
10.3.4.13 Channel Status Register (SPDIFIN_CH_STATUS_0_3, R, Address = 0xFA13_0038)
SPDIFIN_CH_STATUS_0_3
channel_number
source_number
Bit
[7:6] 00 = Mode 0
others = Reserved
[5:3] 000 = Emphasis not indicated
100 = Emphasis – CD type
[2] 0 = Copyright
1 = No copyright
[1] 0 = Linear PCM
1 = Non-linear PCM
[0] 0 = Consumer format
1 = Professional format
Bit
[7:0] Equipment type: [8:15]
CD player: 1000_0000
DAT player: 1100_000L
DCC player: 1100_001L
Mini disc: 1001_001L
(L: information about generation status of the
material)
Bit
[7:4] Specifies the channel number (Bit 20 is LSB).
[3:0] Specifies the source number (Bit 16 is LSB).
10 9BHIGH-DEFINITION MULTIMEDIA INTERFACE
Description
Description
Description
Initial State
2b00
3b000
0
0
0
Initial State
0x00
Initial State
0x0
0x0
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