Samsung S5PC110 Manual page 1978

S5PC110_UM
2.3.1.20 AES Control (AES_control, R/W, Address = 0xEA00_4000)
AES_control
Reserved
AES_ByteSwap_DI
AES_ByteSwap_DO
AES_ByteSwap_IV
AES_ByteSwap_CNT
AES_ByteSwap_Key
Key Change Mode
AES Key Size
FIFO Mode
AES Chain Mode
AES Mode
NOTE:
1. AES_control[0]: In case of CTR mode, AES core should always work in encryption mode, even in decryption.
Therefore, AES_control[0] should always be '0'.
2. AES_control[6]: The Key Change Mode Bit is used if the key is exactly the same as it was before decryption or
encryption. If the AES_control[6] is high, this means the key changes for every block, which consumes double the
time of decryption. If a new key should be applied, at least the first block should be processed with AES_control[6]
high.
Bit
[31:12] -
[11] 0 = Disables Input data byte swap
1 = Enables Input data byte swap
[10] 0 = Disables Output data byte swap
1 = Enables Output data byte swap
[9] 0 = Disables Initial value byte swap
1 = Enables Initial value byte swap
[8] 0 = Disables Counter data byte swap
1 = Enables Counter data byte swap
[7] 0 = Disables Key byte swap
1 = Enables Key byte swap
[6] Specifies the AES key change mode selection
signal.
0 = Key is not changed
1 = Key is changed
[5:4] Specifies the AES key size selection signal.
00 = 128-bit key
01 = 192-bit key
10 = 256-bit key
[3] Specifies the ARM/ FIFO mode selection signal.
0 = ARM mode (ARM Slave)
1 = FIFO mode
[2:1] Specifies the AES chain mode selection signal.
00 = ECB mode
01 = CBC mode
10 = CTR mode
[0] Specifies the Encryption/ Decryption mode selection
signal.
0 = Encryption
1 = Decryption
Description
2 ADVANCED CRYPTO ENGINE
R/W Initial State
- -
R/W
R/W
R/W
R/W
R/W
0
00
0
00
0
2-23