Samsung S5PC110 Manual page 1792

S5PC110_UM
13.5.8 PARAMETER SETTING REGISTERS (MASK)
13.5.8.1 Mask Base Address Register (MASK_BASE_ADDR_REG, W, Address = 0xFA00_0520)
MASK_BASE_
ADDR_REG
MaskAddr
13.5.8.2 Mask Stride Register (MASK_STRIDE_REG, R/W, Address = 0xFA00_0524)
MASK_STRIDE_REG
Reserved
MaskStride
NOTE: - MaskLeftX, MaskTopY, MaskRightX, and MaskBottomY are same as source image
- FIMG-2D V3.0 supports only 1bpp mask image format.
Bit
[31:0] Base address of the mask image
Bit
[31:16] Reserved
[15:0] Mask stride (2's complement value).
Description
Description
13 12BG2D
Initial State
0x0
Initial State
0x0
0x0
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