Samsung S5PC110 Manual page 1817

S5PC110_UM
1.6.3.8 MISC Register (MISC, R/W, Address = 0xEEE2_0208)
MISC
Reserved
Audio decoder select
System timer debug
Endian converter
Endian converter
There are endian converters between external and internal audio subsystems (refer to
AUDIO_ENDIAN SFR at Clock Management Unit (CMU) is used.
* ENDIAN converters setting guide
Register[Bit]
AUDIO_ENDIAN[3]
AUDIO_ENDIAN[2]
AUDIO_ENDIAN[1]
AUDIO_ENDIAN[0]
MISC[1]
MISC[0]
Since having ENDIAN converters, Read/write accesses must always be in 32-bit units (byte or half word accesses
are not allowed).
For more details on I2S V51, refer to the I2S V51 User's Manual.
Bit
[31:4] Reserved
[3] Specifies address range of DMEM
1 = 0xC010_0000 ~ 0xC011_7FFC, when RP is used for
decoder
0 = 0xC001_0000 ~0xC002_7FFC, when ARM is used for
decoder
[2] Specifies usage of Xi2s0SDO1 and Xi2s0SDO2 pad
1 = Xi2s0SDO1 is used as monitor of system timer's tick, and
Xi2s0SDO1 is used as monitor of system timer's interrupt
0 = Xi2s0SDO1 is used as I2SD1, and Xi2s0SDO2 is used as
I2SD2
[1] Specifies the endian converter for IBUF1 write path.
1 = Big endian
0 = Little endian
[0] Specifies the endian converter for IBUF0 write path
1 = Big endian
0 = Little endian
Description
Path
RP read
RP write
ARM read
ARM write
IBUF1 write
IBUF0 write
1 AUDIO SUBSYSTEM
Initial State
0
0
0
0
0
1-1. To set them,
Figure
Guide value
1
0
0
0
1
1
1-13