Samsung S5PC110 Manual page 1523

S5PC110_UM
7.12.1.133 SDO WSS 525 Data Registers (SDO_ARMWSS525, R/W, Address = 0xF900_03C4)
SDO_ARMWSS525
Reserved
CRC of WSS 525 Data
Word 2 of WSS 525 Data
Word 1 of WSS 525 Data
Word 0 of WSS 525 Data
Bit
[31:20] Reserved, read as zero, do not modify
[19:14] Bit alignment of the CRC register is according to their
incoming order. The first incoming bit becomes LSB, i.e.
CRC [19:14] = {b19, b18, b17, b16, b15, b14}, where bn
represents data bit with their incoming order n.
The CRC used is X^6+ X + 1, all preset to 1.
[13:6] Bit alignment of the Word 2 register is according to their
incoming order. The first incoming bit becomes LSB, i.e.
Word 2 [13:6] = {b13, b12, b11, b10, b9, b8, b7, b6},
where bn represents data bit with their incoming order n.
The Word 2 data are used for copy control:
b7, b6 :
00 copying permitted
01 one copy permitted
10 reserved
11 no permission to copy
b9 b8 : (reserved)
b10 :
0 not analog pre-recorded medium
1 analog pre-recorded medium
b13, b12, b11 : (reserved)
[5:2] Bit alignment of the Word 1 register is according to their
incoming order. The first incoming bit becomes LSB, i.e.
Word 1 [5:2] = {b5, b4, b3, b2}, where bn represents
data bit with their incoming order n.
The Word 1 data are used to indicate the existence of
Word 2 data:
b5, b4, b3, b2 :
0000 = copy control information
1111 = default
[1:0] Bit alignment of the Word 0 register is according to their
incoming order. The first incoming bit becomes LSB, i.e.
Word 0 [1:0] = {b1, b0}, where bn represents data bit
with their incoming order n.
The Word 0 data are used for display aspect ratio
control:
b1, b0 :
00 4:3 aspect ratio
01 16:9 aspect ratio
10 4:3 aspect ratio
11 reserved
Description
normal
anamorphic
letterbox
7 6BTVOUT & VIDEO DAC
Initial State
0
0
0
0
0
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