Samsung S5PC110 Manual page 1697

Risc microprocessor
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S5PC110_UM
10.3.4.22 SPDIFIN Info Register (SPDIFIN_DATA_BUF0_1/2/3)
SPDIFIN_DATA_BUF_0_1, R, Address = 0xFA13_0060
SPDIFIN_DATA_BUF_0_2, R, Address = 0xFA13_0064
SPDIFIN_DATA_BUF_0_3, R, Address = 0xFA13_0068
SPDIFIN_DATA_BUF0_1/2/3
received_data_0_1
received_data_0_2
received_data_0_3
10.3.4.23 SPDIFIN Info Register (SPDIFIN_USER_BUF_0, R, Address = 0xFA13_006C)
SPDIFIN_USER_BUF_0
received_data_user_0
-
Bit
[7:0]
Specifies the PCM or stream data for 1st burst of
HDMI.
[7:0]
SPDIFIN_DATA_BUF_0_1 =
[7:0]
SPDIFIN_DATA_BUF_0[7:0]
SPDIFIN_DATA_BUF_0_2 =
SPDIFIN_DATA_BUF_0[15:8]
SPDIFIN_DATA_BUF_0_3 =
SPDIFIN_DATA_BUF_0[23:16]
If SPDIFIN_CONFIG.data_align is '0' for 16-bit,
received_data is equal to {data_(N)th,
data_(N+1)th}.
If SPDIFIN_CONFIG.data_align is '1' for 32-bit,
received_data is equal to {U, V, C, P, zero-padding,
and data[n:0]}.
If SPDIFIN_CONFIG.U_V_P_report is '0',
received_data is equal to {zero-padding, data[n:0]}.
, where, 'n' is dependent on
SPDIFIN_CH_STATUS_1 and word_length if
SPDIFIN_CONFIG. data_type is 0 for PCM.
'n' is equal to 15 if SPDIFIN_CONFIG.data_type is
1 for stream.
If SPDIFIN_CONFIG.HDMI_burst_size is 1 burst,
HDMI accesses only this data register.
Bit
[7:4]
Specifies the user bit of 1st burst of HDMI
received_data[7:4] =
SPDIFIN_DATA_BUF_0[31:28].
[3:0]
Reserved
10 9BHIGH-DEFINITION MULTIMEDIA INTERFACE
Description
Description
Initial State
0x00
Initial State
0x0
0x0
10-88

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