Samsung S5PC110 Manual page 1436

S5PC110_UM
6.3.3.3 Decoder Channel and Stream Interface Registers
6.3.3.3.1 Vertical Resolution Register (MFC_COMMON_SI_RG_1, R, Address = 0xF170_2004)
MFC_COMMON_SI_RG_1
VER_RESOL
6.3.3.3.2 Horizontal Resolution Register (MFC_COMMON_SI_RG_2, R, Address = 0xF170_2008)
MFC_COMMON_SI_RG_2
HOR_RESOL
6.3.3.3.3 Required Buffer Number Register (MFC_COMMON_SI_RG_3, R, Address = 0xF170_200C)
MFC_COMMON_SI_RG_3
MIN_NUM_DPB
6.3.3.3.4 Display Order Luminance Address Register (MFC_COMMON_SI_RG_4, R, Address =
0xF170_2010)
MFC_COMMON_SI_RG_4
DISPLAY_Y_ADR
6.3.3.3.5 Display Order Chrominance Address Register (MFC_COMMON_SI_RG_5, R, Address =
0xF170_2014)
MFC_COMMON_SI_RG_5
DISPLAY_C_ADR
Bit
[31:0] Vertical resolution of the current channel. It should
be read after decoding sequence header.
Bit
[31:0] Horizontal resolution of the current channel. It
should be read after decoding sequence header.
Bit
[31:0] Required decoded picture buffer number. After
decoding sequence header, MFC sets the minimum
number of required DPB buffers.
Bit
[31:0] Display luminance address in display order
Bit
[31:0] Display chrominance address in display order
Description
Description
Description
Description
Description
6 5BMULTI FORMAT CODEC
Initial State
0
Initial State
0
Initial State
0
Initial State
0
Initial State
0
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