Samsung S5PC110 Manual page 2030

Risc microprocessor
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S5PC110_UM
VCLK(internal)
SYS_RS
SYS_CSn
SYS_WE
SYS_VD
(VDDINT = 1.1V ± 5%, TA = -25 to 85°C, VDDlcd = 1.7V - 3.6V)
Parameter
SYS_RS to SYS_CSn Low
SYS_CSn Low to SYS_WR Low
SYS_WE Pulse Width
SYS_WE Hight to SYS_CSn High
NOTE: Internal VCLK period
T
cssetup
T
wrsetup
Figure 1-10 LCD I80 Interface Timing
Table 1-13 LCD I80 Interface Signal Timing Constants
Symbol
Tcssetup
Twrsetup
Twract
Twrhold
T
wract
Minimum
Typical
-
LCD_CS_SETUP + 1
-
LCD_WR_SETUP + 1
-
LCD_WR_ACT + 1
-
LCD_WR_HOLD + 1
1 ELECTRICAL DATA
T
wrhold
Maximum
-
-
-
-s
Unit
Pvclk*
Pvclk
Pvclk
Pvclk
1-23

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