Samsung S5PC110 Manual page 1678

S5PC110_UM
10.3.3.68 HDCP Register Description (HDCP_Ri_0/1)
•
HDCP_Ri_0, R, Address = 0xFA11_0740
•
HDCP_Ri_1, R, Address = 0xFA11_0744
HDCP_Ri_0/1
HDCP_Ri
10.3.3.69 HDCP Register Description (HDCP_I2C_INT, R/W, Address = 0xFA11_0780)
HDCP_I2C_INT
-
HDCP_I2C_INT
10.3.3.70 HDCP Register Description (HDCP_AN_INT, R/W, Address = 0xFA11_0790)
HDCP_AN_INT
-
HDCP_AN_INT
Bit
[15:0] Specifies the HDCP Ri value of transmitter.
Bit
[7:1] Reserved
[0] Specifies the HDCP I2C interrupt status (active high). It
indicates the start of I2C transaction if it is set. After
active, it should be cleared by S/W by writing 0.
0 = Does not occur
1 = Occurs
Bit
[7:1] Reserved
[0] Specifies the HDCP An Interrupt status (active high). If
An value is available, it is set. After active, it should be
cleared by S/W by writing 0.
0 = Does not occur
1 = Occurs
10 9BHIGH-DEFINITION MULTIMEDIA INTERFACE
Description
Description
Description
Initial State
0x0000
Initial State
7b0000000
0
Initial State
7b0000000
0
10-69