Samsung S5PC110 Manual page 1722

S5PC110_UM
10.3.6.50 CEC Configure Register (CEC_RX_STATUS_1, R, Address = 0xE1B0_000C)
CEC_RX_STATUS_1
Rx_Bytes_Received
10.3.6.51 CEC Configure Register (CEC_INTR_MASK, R/W, Address = 0xE1B0_0010)
CEC_INTR_MASK
-
Mask_Intr_Rx_Error
Mask_Intr_Rx_Done
-
Mask_Intr_Tx_Error
Mask_Intr_Tx_Done
Bit
[7:0] Specifies the number of blocks received (1 byte = 1 block
in a CEC message).
After receiving the CEC message, the field will be
updated. It will be cleared if Clear_Intr_Rx_Done or
Clear_Intr_Rx_Error bit in CEC_Intr_Clear register is set.
Bit
[7:6] Reserved
[5] Specifies the Rx_Error interrupt mask bit.
0 = Enables
1 = Disables
[4] Specifies the Rx_Done interrupt mask bit.
0 = Enables
1 = Disables
[3:2] Reserved
[1] Specifies the Tx_Error interrupt mask bit.
0 = Enables
1 = Disables
[0] Specifies the Tx_Done interrupt mask bit.
0 = Enables
1 = Disables
10 9BHIGH-DEFINITION MULTIMEDIA INTERFACE
Description
Description
Initial State
0
Initial State
2b00
0
0
2b00
0
0
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