Samsung S5PC110 Manual page 1914

Risc microprocessor
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S5PC110_UM
6.4.6 SHADOWED REGISTER
Both SPDBSTAS_SHD register and SPDCNT_SHD register are shadowed registers which are related to
SPDBSTAS register and SPDCNT register, respectively. They are updated from related registers at every stream
end interrupt signal. The usage of shadowed register is as follows.
1. Set burst status and repetition count information to their respective registers.
2. Turn on SPDIF module, and stream end interrupt is asserted immediately.
3. With stream end interrupt, shadowed registers are updated from their related registers and SPDIF starts to
transfer data. Now next stream information (burst status and repetition count) can be written to SPDBSTAS
and SPDCNT register because previous information is copied to their respective shadowed registers.
4. Set next stream information to SPDBSTAS and SPDCNT register.
5. Wait for stream end interrupt which signals the end of the first stream.
6. With stream end interrupt, the 2nd stream data will start to transfer. Set 3rd stream information to registers.
The usage of user bit registers is similar to stream information registers except that they are not related to SPDIF
end interrupt but to user data interrupt. As soon as SPDIF is on, shadowed user bit registers are updated from
their related registers and user bit starts to be shifted out with user data interrupt asserted. User can write the next
user data to registers with this interrupt. After entire 96 user bits are shifted out, user data interrupt will be
asserted again and 3rd user bits can be written to registers with 2nd user bits going out.
6 SPDIF TRANSMITTER
6-8

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