Samsung S5PC110 Manual page 1866

Risc microprocessor
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S5PC110_UM
3.7 REGISTER DESCRIPTION
3.7.1 REGISTER MAP
Register
Address
I2S1
IISCON
0xE210_0000
IISMOD
0xE210_0004
IISFIC
0xE210_0008
IISPSR
0xE210_000C
IISTXD
0xE210_0010
IISRXD
0xE210_0014
I2S2
IISCON
0xE2A0_0000
IISMOD
0xE2A0_0004
IISFIC
0xE2A0_0008
IISPSR
0xE2A0_000C
IISTXD
0xE2A0_0010
IISRXD
0xE2A0_0014
NOTE: All registers of IIS interface are accessible by word unit with STR/LDR instructions.
R/W
R/W
Specifies the IIS interface control register
R/W
Specifies the IIS interface mode register
R/W
Specifies the IIS interface FIFO control register
R/W
Specifies the IIS interface clock divider control
register
W
Specifies the IIS interface transmit data register
R
Specifies the IIS interface receive data register
R/W
Specifies the IIS interface control register
R/W
Specifies the IIS interface mode register
R/W
Specifies the IIS interface FIFO control register
R/W
Specifies the IIS interface clock divider control
register
W
Specifies the IIS interface transmit data register
R
Specifies the IIS interface receive data register
Description
3 IIS-BUS INTERFACE
Reset Value
0xE00
0x0
0x0
0x0
0x0
0x0
0xE00
0x0
0x0
0x0
0x0
0x0
3-15

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