Samsung S5PC110 Manual page 1501

Risc microprocessor
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S5PC110_UM
7.12.1.3 SDO Video Scale Configuration Register (SDO_SCALE, R/W, Address = 0xF900_000C)
SDO_SCALE
Reserved
Reserved
Reserved
Setup Level Selection for
Composite
Video-to-Sync Ratio Selection for
Composite
NOTE: The Table 7-5 and Table 7-6 according to the value of bit [3:2]
Bit
[31:4]
Reserved, read as zero, do not modify
[3]
Reserved, read as zero, do not modify
[2]
Reserved, read as zero, do not modify
[1]
0 = 0 IRE
1 = 7.5 IRE
This setting is valid if bit[6] of SDO_CONFIG
register is set to composite.
[0]
0 = 10:4
1 = 7:3
This setting is valid if bit[6] of SDO_CONFIG
register is set to composite.
Description
7 6BTVOUT & VIDEO DAC
Initial State
0
0
1
1
0
7-29

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