Samsung S5PC110 Manual page 1721

S5PC110_UM
10.3.6.49 CEC Configure Register (CEC_RX_STATUS_0, R, Address = 0xE1B0_0008)
CEC_RX_STATUS_0
-
Rx_BCast
Rx_Error
Rx_Done
Rx_Receiving
Rx_Running
Bit
[7:5] Reserved
[4] Specifies the broadcast message flag.
0 = Received CEC message is the address to a single
device
1 = Received CEC message is the broadcast message
It will be cleared
- if Rx_Enable bit of CEC_RX_CTRL_0 is reset
- if Clear_Intr_Rx_Done or Clear_Intr_Rx_Error bit
in CEC_INTR_CLEAR register is set
[3] Specifies the CEC Rx_Error interrupt flag. This bit field
also specifies the status of Rx_Error interrupt and is valid
only if Rx_Done bit is set.
0 = No error occurs
1 = An error occurs while receiving a CEC message
It will be cleared
- if Rx_Enable bit of CEC_RX_CTRL_0 is reset
- if Clear_Intr_Rx_Done or Clear_Intr_Rx_Error bit
in CEC_INTR_CLEAR register is set
[2] Specifies the CEC Rx done interrupt flag. This bit field
also specifies the status of Rx_Done interrupt.
0 = Running or Idle
1 = Finishes CEC Rx transfer
It will be cleared:
- if Rx_Enable bit of CEC_RX_CTRL_0 is reset
- if Clear_Intr_Rx_Done or Clear_Intr_Rx_Error bit in
CEC_INTR_CLEAR register is set
[1] 0 = Rx waits for a CEC message
1 = Rx receives data via CEC bus
[0] 0 = Disables Rx
1 = Enables CEC Rx and waits for a message on the
CEC bus
10 9BHIGH-DEFINITION MULTIMEDIA INTERFACE
Description Initial State
3b000
0
0
0
0
0
10-112