Samsung S5PC110 Manual page 1979

S5PC110_UM
2.3.1.21 AES Control (AES_status, R/W, Address = 0xEA00_4004)
AES_status
Reserved
Busy
Input Ready
Output Ready
NOTE: To clear the Output Ready bit, write 0x1 at that bit, AES_status[0].
2.3.1.22 AES Control (AES_indata_01, W, Address = 0xEA00_4010)
AES_indata_01
AES_indata_01
2.3.1.23 AES Control (AES_indata_02, W, Address = 0xEA00_4014)
AES_indata_02
AES_indata_02
2.3.1.24 AES Control (AES_indata_03, W, Address = 0xEA00_4018)
AES_indata_03
AES_indata_03
Bit
[31:3] -
[2] Specifies the AES busy signal.
0 = Idle
1 = Busy
[1] Specifies the AES input ready signal.
0 = AES input buffer is not empty
1 = AES input buffer is empty, and the host is permitted
to write the next block of data
[0] Specifies the AES output ready signal.
0 = AES output is not available
1 = AES output is available to the host for retrieval
Bit
[31:0] Specifies the Input data [127:96].
Bit
[31:0] Specifies the Input data [95:64].
Bit
[31:0] Specifies the Input data [63:32].
Description
Description
Description
Description
2 ADVANCED CRYPTO ENGINE
R/W Initial State
- -
0
1
0
R/W Initial State
0
R/W Initial State
0
R/W Initial State
0
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