Samsung S5PC110 Manual page 1679

S5PC110_UM
10.3.3.71 HDCP Register Description (HDCP_WATCHDOG_INT, R/W, Address = 0xFA11_07A0)
HDCP_WATCHDOG_INT
-
HDCP_WATCHDOG_INT
10.3.3.72 HDCP Register Description (HDCP_RI_INT, R/W, Address = 0xFA11_07B0)
HDCP_RI_INT
-
HDCP_Ri_INT
Bit
[7:1] Reserved
[0] Specifies the HDCP watchdog interrupt status (active
high). If the repeater bit value is set after 1st
authentication success, this bit is set. After active, it
should be cleared by S/W by writing 0.
0 = Does not occur
1 = Occurs
Bit
[7:1] Reserved
[0] If Ri value is updated internally (at every 128 video frames),
it is set to high. After set, it should be cleared by S/W by
writing 0.
0 = Does not occur
1 = Occurs
10 9BHIGH-DEFINITION MULTIMEDIA INTERFACE
Description
Description
Initial State
7b0000000
0
Initial State
7b0000000
0
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