Samsung S5PC110 Manual page 1694

S5PC110_UM
10.3.4.14 Channel Status Register (SPDIFIN_CH_STATUS_0_4, R, Address = 0xFA13_003C)
SPDIFIN_CH_STATUS_0_4
-
clock_accuracy
sampling_frequency
10.3.4.15 Channel Status Register (SPDIFIN_CH_STATUS_1, R, Address = 0xFA13_0040)
SPDIFIN_CH_STATUS_1
-
word_length
field_size
Bit
[7:6] Reserved
[5:4] Specifies the clock accuracy.
00 = level II, ±1000ppm
01 = level I, ±50ppm
10 = level III, variable pitch shifted
[3:0] Specifies the sampling frequency.
0100 = 22.05kHz
0000 = 44.1kHz
1000 = 88.2kHz
1100 = 176.4kHz
0110 = 24kHz
0010 = 48kHz
1010 = 96kHz
1110 = 192kHz
0011 = 32kHz
Bit
[7:4] Reserved
[3:1] Specifies the word length.
(field_size = 1)
000 = not indicated
101 = 24-bits
100 = 23-bits
010 = 22-bits
110 = 21-bits
001 = 20-bits
[0] Specifies the field size.
0 = Maximum length 20-bits
1 = Maximum length 24-bits
10 9BHIGH-DEFINITION MULTIMEDIA INTERFACE
Description
Description
(field_size = 0)
not indicated
20-bits
19-bits
18-bits
17-bits
16-bits
Initial State
2b00
2b00
0x0
Initial State
0x0
3b000
0
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