Samsung S5PC110 Manual page 1949

S5PC110_UM
8.7.1.1 KEYPAD Interface Control Registers (KEYIFCON, R/W, Address = 0xE160_0000)
KEYIFCON Bit
Reserved [31:5]
WAKEUPEN [4]
FC_EN [3]
DF_EN [2]
INT_R_EN [1]
INT_F_EN [0]
NOTE: Both edge interrupt is selected when both INT_F_EN and INT_R_EN are set.
8.7.1.2 KEYPAD Interrupt Status and Clear Register (KEYIFSTSCLR, R/W, Address = 0xE160_0004)
KEYIFSTSCLR Bit
R_INT [29:16]
P_INT [13:0]
NOTE: Keypad wakeup interrupt is also cleared when the write access to the KEYIFSTSCLR.
Reserved for future use
KEYPAD input Stop / Idle mode wakeup enable.
Wakeup signal is to System Controller.
0 = Disables
1 = Key input Low Level (while key-pressed) wakeup
10-bit counter (for debouncing digital filter clock) enable
0 = Disables: No use division counter
1 = Enables: use division counter
KEYPAD input port debouncing filter enable
0 = Disables
1 = Enables
KEYPAD input port rising edge (key-released) interrupt
0 = Disables
1 = Enables
KEYPAD input port falling edge (key-pressed) interrupt
0 = Disables
1 = Enables
KEYPAD input "release" interrupt (rising edge) status(read) and
clear(write)
Read:
1 = Released interrupt occurred
0 = Not occurred
Write: Released interrupt is cleared when write '1'
The R_INT[13:0] indicate that each key pressed from 0 to 13 has
a dedicated interrupt from R_INT[16] to R_INT[29]
KEYPAD input "press" interrupt (falling edge) status(read) and
clear(write)
Read:
1 = Pressed interrupt occurred
0 = Not occurred
Write: Pressed interrupt is cleared when write '1'
The P_INT[13:0] indicate that each key released from 0 to 13
has a dedicated interrupt from P_INT[0] to P_INT[13]
Description
Description
8 KEYPAD INTERFACE
Initial State
-
1'b0
1'b0
1'b0
1'b0
1'b0
Initial State
14'b0
14'b0
8-12