Samsung S5PC110 Manual page 1379

S5PC110_UM
CSIS_INTSRC
ERR_ID
4.6.1.7 Resolution Register (CSIS_RESOL, R/W, Address = 0xFA60_002C)
CSIS_RESOL
HResol
VResol
4.6.1.8 Shadow Configuration Register (CSIS_sdw_config, R, Address = 0xFA60_0038)
CSIS_SDW_CONFIG
Hsync_LIntv
Vsync_SIntv
Vsync_EIntv
DataFormat[5:0]
NumOfDatLane[1:0]
Bit
[0] Specifies unknown ID error.
Write 1 = Clears status bit
Write 0 = No effect
Bit
[31:16] Specifies horizontal image resolution.
Input boundary of each image format is as follows:
YUV422 (8-bit): 0x0001 ~ 0xFFFF
RAW8: 0x0001 ~ 0xFFFF
RAW10: 4n (where n is 1, 2, 3, ...)
RAW12: 2n (where n is 1, 2, 3, ...)
[15:0] Specifies vertical image resolution.
Input boundary: 0x0001 ~ 0xFFFF
Bit
[31:26] Specifies current interval between Hsync falling and Hsync
rising (Line interval).
[25:20] Specifies current interval between Vsync rising and first
Hsync rising.
[19:8] Specifies current interval between last Hsync falling and
Vsync falling.
[7:2] Specifies current image data format.
[1:0] Specifies current number of data lanes. These bits are
always the same as the number of data lanes in
CSIS_CONFIG register because these bits are static
signals that do not change in operation.
Description
Description
Description
4 3BMIPI CSIS
Initial State
0
Initial State
0x8080
0x8080
Initial State
0
0
0
0
0
4-12