Samsung S5PC110 Manual page 1448

Risc microprocessor
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S5PC110_UM
6.3.4.1.3 Multi-slice Control Register (ENC_MSLICE_CTRL, R/W, Address = 0xF170_C50C)
ENC_MSLICE_CTRL
Reserved
MSLICE_MODE
MSLICE_ENA
6.3.4.1.4 Macroblock Number of Multi-slice Register (ENC_MSLICE_MB, R/W, Address = 0xF170_C510)
ENC_MSLICE_MB
Reserved
MSLICE_MB
6.3.4.1.5 Byte Number of Multi-slice Register (ENC_MSLICE_BYTE, R/W, Address = 0xF170_C514)
ENC_MSLICE_BYTE
MSLICE_BYTE
6.3.4.1.6 Cyclic Intra Refresh Register (ENC_CIR_CTRL, R/W, Address = 0xF170_C518)
ENC_CIR_CTRL
Reserved
CIR_NUM
Bit
[31:3]
Reserved
[2:1]
0 = Multi slicing is done by MB count
1 = Multi slicing is done by byte count
[0]
0 = One slice per frame
1 = Enable multi slice or resync marker
Bit
[31:16] Reserved
[15:0]
The number of macroblocks in one slice.
Valid if MSLICE_MODE=0 and MSLICE_ENA=1.
Bit
[31:0]
The number of byte count in one slice.
Valid if MSLICE_MODE=1 and MSLICE_ENA=1.
Bit
[31:16] Reserved
[15:0]
Number of intra refresh macroblocks
Description
Description
Description
Description
6 5BMULTI FORMAT CODEC
Initial State
0
0
0
Initial State
0
0
Initial State
0
Initial State
0
0
6-56

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