Samsung S5PC110 Manual page 1863

Risc microprocessor
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S5PC110_UM
3 IIS-BUS INTERFACE
BLC = 00
BLC = 01
7
0
31
16
15
RIGHT CHANNEL
LEFT CHANNEL
LOC 0
LOC 1
LOC 2
LOC 3
LOC 4
LOC 5
LOC 6
LOC 7
LOC 8
LOC 9
LOC 10
LOC 11
LOC 12
LOC 13
LOC 14
LOC 15
Figure 3-6
RX FIFO Structure for BLC = 00 or BLC = 01
3-12

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