Samsung S5PC110 Manual page 1531

Risc microprocessor
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S5PC110_UM
7.12.2.4 SDO CGMS-A 525 Data Shadow Registers (SDO_CGMS525, R/W, Address = 0xF900_038C)
SDO_CGMS525
Reserved
CRC of CGMS-A 525 Data
Word 2 of CGMS-A 525 Data
Word 1 of CGMS-A 525 Data
Word 0 of CGMS-A 525 Data
7.12.2.5 SDO CGMS-A 625 Data Registers (SDO_CGMS625, R/W, Address = 0xF900_0394)
SDO_CGMS625
Reserved
Group D of CGMS-A 625 Data
Group C of CGMS-A 625 Data
Group B of CGMS-A 625 Data
Group A of CGMS-A 625 Data
Bit
[31:20]
Reserved, read as zero, do not modify
[19:14]
If MCU set values of SDO_ARMCGMS525, the
[13:6]
values are copied into this shadow register at the
next vertical sync interrupt.
[5:2]
Do not set values to this shadow register.
[1:0]
Bit
[31:14]
Reserved, read as zero, do not modify
[13:11]
If MCU set values of SDO_ARMCGMS625, the
[10:8]
values are copied into this shadow register at the
next vertical sync interrupt.
[7:4]
Do not set values to this shadow register.
[3:0]
Description
Description
7 6BTVOUT & VIDEO DAC
Initial State
0
0
0
0
0
Initial State
0
0
0
0
0
7-59

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