Samsung S5PC110 Manual page 1709

S5PC110_UM
10.3.6 TIMING GENERATOR REGISTER (TG CONFIGURE/STATUS REGISTER)
10.3.6.1 TG Command Register (TG_CMD, R/W, Address = 0xFA15_0000)
TG_CMD
Reserved
getsync_type
getsync_en
Reserved
field_en
tg_en
10.3.6.2 Horizontal Full Size (TG_H_FSZ_L, R/W, Address = 0xFA15_0018)
TG_H_FSZ_L
TG_H_FSZ_L
10.3.6.3 Horizontal Full Size (TG_H_FSZ_H, R/W, Address = 0xFA15_001C)
TG_H_FSZ_H
Reserved
TG_H_FSZ_H
10.3.6.4 Horizontal Active Start Position (TG_HACT_ST_L, R/W, Address = 0xFA15_0020)
TG_HACT_ST_L
TG_HACT_ST_L
Bit
[7:5] Reserved
[4] Specifies the timing correction enable bit. If this bit is set, the
input VSYNC timing error relative to output VSYNC is
corrected.
0 = Disables
1 = Enables
[3] Enables BT656 input synchronization.
[2] Reserved
[1] Enables field mode. For 1080i, this should be enabled.
[0] Specifies the TG global enable bit.
Bit
[7:0] Specifies the horizontal full size (1~8191) (Lower part).
Bit
[7:5] Reserved
[4:0] Specifies the horizontal full size (1~8191) (Upper part).
Bit
[7:0] Specifies the horizontal active start position (1~4095) (Lower
part).
10 9BHIGH-DEFINITION MULTIMEDIA INTERFACE
Description
Description
Description
Description
Initial State
000
0
0
0
0
0
Initial State
0x72
Initial State
0x0
0x6
Initial State
0x05
10-100