Samsung S5PC110 Manual page 1373

Risc microprocessor
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S5PC110_UM
4.6 REGISTER DESCRIPTION
4.6.1 REGISTER MAP
Register
CSIS_CONTROL
CSIS_DPHYCTRL
CSIS_CONFIG
CSIS_DPHYSTS
CSIS_INTMSK
CSIS_INTSRC
CSIS_RESOL
SDW_CONFIG
SDW_RESOL
CSIS_PKTDATA
NOTE: S_RESETN at MIPI_PHY_CON0 (0xE010_E814) should be '1' before enabling CSIS.
Address
R/W
0xFA60_0000
R/W
0xFA60_0004
R/W
0xFA60_0008
R/W
0xFA60_000C
R
0xFA60_0010
R/W
0xFA60_0014
R/W
0xFA60_002C
R/W
0xFA60_0038
R/W
0xFA60_003C
R
0xFA60_2000
R
~
0xFA60_3FFC
Description
Specifies the control register.
Specifies the D-PHY control register.
Specifies the configuration register.
Specifies the D-PHY stop state register.
Specifies the interrupt mask register.
Specifies the interrupt status register.
Specifies the image resolution register.
Specifies the shadow register of
configuration.
Specifies the shadow register of
resolution.
Specifies the memory area for storing
non-image data.
Odd frame: 0x2000 ~ 0x2FFC
Even frame: 0x3000 ~ 0x3FFC
4 3BMIPI CSIS
Reset Value
0x0010_0000
0x0000_0000
0x0000_0000
0x0000_00F1
0x0000_0000
0x0000_0000
0x8000_8000
0x0000_0000
0x8000_8000
0xXXXX_XXXX
4-6

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