Samsung S5PC110 Manual page 1895

S5PC110_UM
shows a PCM transfer with the MSB configured one shift clock after the PCMSYNC. This MSB
Figure 5-2
positioning corresponds to setting the TX_MSB_POS and RX_MSB_POS bits in PCMCTL register to be 1.
input PCMCODEC_CLK
output PCMSCLK
output PCMFSYNC
output PCMSOUT
input PCMSIN
internal pcm_irq
( sync to DSP clk )
S5PC110 PCM can select clock either PCLK or External Clock. Refer
refer to the SYSCON part (SCLKCON, PCLKCON )
15
15
Figure 5-2 PCM timing, POS_MSB_WR/RD = 1
Figure 5-3 Input Clock Diagram for PCM
. . .
14 1 0
. . .
14 1 0
5-3. To enable clock gating, please
Figure
5 PCM AUDIO INTERFACE
dont care
dont care
datain_reg_valid
15
15
5-4