Figure 2-2 48 × 48-Bit Multiplication With 48 Bits Of The Result; Kept - Motorola DSP56600 Manual

Application optimization for digital signal processors
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Data Operations
Double precision arithmetic
2-12
Optimizing DSP56300/DSP56600 Applications
47
+
47
47
X1(s) • Y1(s)
47
Result accumulator
Figure 2-2 48 × 48-bit Multiplication with 48 Bits of the Result Kept.
The (U) means an unsigned operand, and the (S) a signed operand.
The following four instructions perform the operation in full:
;48x48 bit multiplication with 48 bit result.
;============================================
;first operand - X1:X0
;second operand -Y1:y0
;result is in accumulator A.
mpyuu
dmacsu y1,x0,a
macsu
dmacss x1,y1,a
23
X1
×
23
Y1
47
Y1(s) • X0(u)
X1(s) • Y0(u)
0
0
x0,y0,a
;
;a>>24 +y1(s) * x0 (u) -> a
x1,y0,a
;a +
;a>>24 +x1(s) * y1 (s) -> a
0
23
X0
0
23
Y0
X0(u) • Y0(u)
0
0
x0(u) * y0 (u) -> a
x1(s) * y0 (u) -> a
MOTOROLA
0
0
0
AA0832

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